Introduction of the Post-K Processor Instruction Set Architecture

- Hot Chips 28 Presentation by Fujitsu -

Fujitsu recently participated in Hot Chips 28, the IEEE (Institute of Electrical and Electronics Engineers Inc.) symposium for high performance chips, where we presented the Post-K processor's "instruction set architecture" (ISA).

The Post-K processor employs the ARM ISA, developed by ARM Ltd., with enhancements for supercomputer use. Meanwhile, Fujitsu has been developing the microarchitecture of the processor.

In our presentation, we also explained that the development of mainframe processors and UNIX server SPARC processors will continue into the future. The reason that Fujitsu is able to continuously develop multiple processors is because of our shared microarchitecture approach to processor development.

"Hot Chips 28" Outline

Date: Sunday, August 21st to Tuesday, August 23rd, 2016
Place: Flint Center, Cupertino, CA, USA.
Sponsor: IEEE
Fujitsu Presentation Theme: Introduction of Fujitsu's HPC Processor for the Post-K Computer
Speaker: Toshio Yoshida, Director of Engineering Department I, Processor Development Division, Advanced System Development Unit, Fujitsu Ltd.

PDF Introduction of Fujitsu's HPC Processor for the Post-K Computer (225KB)

Toshio Yoshida, Director of Engineering Department I, Processor Development Division, Advanced System Development Unit, FUJITSU Ltd.

Flint Center, Cupertino

Instruction Set Architecture and Microarchitecture Differences

What is the difference between instruction set architecture and microarchitecture?
Instruction set architecture (ISA) is an interface between processor hardware and software. The same software runs on processors which have the same ISA, as long as the operating system used is also the same. In smart phones such as ARROWS and the iPhone, processors that use the ARM ISA are popular. In personal computers, x86 ISA processors are widely used. On the other hand, server processors have adopted a variety of ISAs. For instance, SPARC ISA is used for Fujitsu and Oracle server processors, POWER ISA for IBM server processors, and x86 ISA for Intel and AMD processors. For supercomputers, various ISAs have been adopted.

An ISA defines the interface between processor hardware and software, but it does not define the internal structure of the processor. Each processor vendor independently defines their own internal processor structure. For instance, Fujitsu and Oracle design the internal structures of their own processors independently, but their processors both use the same SPARC ISA.

The internal structure of a processor is its microarchitecture. Since microarchitecture greatly influences the performance and reliability of processors, it is the key technology for processor vendors.

The relationship between ISA and microarchitecture can be explained using cars as an example. The type of gearshift (automatic or manual) and the position of the steering wheel (right or left) is the interface between car and driver. On the other hand, the engine type (in-line four-cylinder or turbo-charged six-cylinder) and the engine positions (FF or FR) are internal structures of the car and greatly contribute to the car's performance.

In Japan, a person with a Class II driving license is limited to driving automatic transmission cars and is not able to drive a manual transmission car. However, the car's automotive performance (speed) does not depend on the type of transmission, but is determined by the internal structure of the car, such as the type of engine.

The processor ISA corresponds to the type of transmission. The same binary software made for one processor does not run on a processor with a different ISA. On the other hand, the microarchitecture corresponds to the type of engine in the car. The microarchitecture determines the performance of the processor.

Fujitsu Is the Only Vendor Developing Processors for Mainframe, UNIX, and Supercomputers

Fujitsu develops mainframe processors used in mission-critical fields. We also develop UNIX server processors with technology originally implemented for mainframes. We develop supercomputer processors by applying UNIX server processor technology. These mutual processor technologies are used in our mainframe, UNIX server and supercomputer processors. Fujitsu is the only vendor which develops all three types of processors in one team.

What is the secret which enables Fujitsu to develop processors in this way? It is strongly related to the microarchitecture previously described. While the mainframe, UNIX server, and supercomputer processors use different ISAs, the essential microarchitecture between them is the same.

A processor behaves as follows:
1. Fetch an instruction from memory.
2. Decode the instruction code bit pattern.
3. Execute the instruction.
4. Write the execution result into the register.
The ISA mainly relates to 2, because bit patterns and the behavior of each instruction are defined in the ISA. In other words, 1, 3 and 4 are independent of the specific ISA. So, mainframe, UNIX, and supercomputer processors can share the same microarchitecture.

This figure shows the internal structure of the Fujitsu mainframe and UNIX processors. Since the microarchitecture is the same, they look very similar.

The Fujitsu processor development style allows us to design processors which have all the merits of mainframe, UNIX server, and supercomputer processors. For instance, Fujitsu supercomputer processors have a unique mechanism called instruction retry (Note 1), which other vendors' supercomputer processors do not have. This is an application of our mainframe processor technology, which provides the high reliability required in mission-critical fields.

The Fujitsu UNIX server processor has adopted SIMD (Single Instruction Multiple Data) technology from a Fujitsu supercomputer processor, which allows the processor to handle two or more pieces of data in one instruction. Our SIMD technology is closely aligned with the Oracle Database, accelerating the in-memory database processing even further. For instance, there is a customer case where the retrieval performance is shortened to less than 1/300 the normal time when compared with the past. The technology enables real-time processing of enormous amounts of data, and is used for various high-speed data analysis workloads such as fraud detection in the financial industry and fault prediction in manufacturing. (Note 2)

The Fujitsu processor design team continues to develop technologies required for mainframe, UNIX server and supercomputer processors, and applying these technologies across all of our processors to enhance the functionality, reliability, performance and value of our computer products. In this style of development, our goal is to provide innovative technologies that enable our customers to optimize their own business processes and results.

(Note 1) A mechanism to detect and remove errors automatically by re-executing the faulty instruction.
(Note 2) [ Japan Net Bank Chooses SPARC M10 as Its IT System Platform ] [PDF Query Acceleration of Oracle Database 12c In-Memory using Software on Chip Technology with Fujitsu M10 SPARC Servers (1.48 MB)]

Contiguous Processor Development in the Future

Fujitsu has developed mainframe, UNIX, and supercomputer processors by sharing the individual technologies across all three platforms. Fujitsu has adopted the ARM ISA for the Post-K processor, while its microarchitecture is based on current Fujitsu mainframe, UNIX and supercomputer processors. Fujitsu will also continue to enhance our microarchitecture for mainframe processors and SPARC-based UNIX server processors.